Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
5.3
SPI Connector C9
Table 5.7 details connector pinout for the SPI connector C9. A full description of each signal is available
in the VNC2 data sheet.
Figure 5.8
SPI Connector CN9
Signal name
Connector
pin
VCN2 Pin No
48-PIN 64-PIN
IO type
Description
5V (22)
GND
3.3V (23)
1
2
3
-
-
-
-
-
-
-
-
-
5V power rail.
Ground pin
3.3V power rail.
SCLK
(24)
4
20
61
Input
SPI CLK Input
SDO
(24)
5
21
62
Output
SPI Master out slave in
SDI
(24)
6
22
63
Input
SDI Master in slave out
CS#
GND
(24)
7
8
23
-
64
-
Output
-
Active low slave chip select 0 from master to
slave 0
Ground pin
Notes:
(22) This pin is connected to the board?s 5V power rail. External device can draw no more than 250mA when
board is powered from an external power supply and no more than 50mA when the board is powered from
USB bus.
(23) This pin is connected to 3.3V regulator output. External device can draw no more than 100mA when board
is powered from an external power supply and no more than 50mA when the board is powered from USB
bus.
(24) All VNC2?s IO pins can be driven from 3.3V LVTTL TTL logic levels..
The use of these pins for GPIO is set by the IOMUX on the VNC2 device. The pins are shared by other
connectors on the board. Care should be taken to ensure that pins are not driven from other headers on
the board.
Table 5.7
SPI Port Connector CN9
Copyright ? 2010 Future Technology Devices International Limited
20
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